Flashrom/0.9.2: Difference between revisions

From flashrom
Jump to navigation Jump to search
No edit summary
(Hopefully complete feature list, now rewrite it in a way that looks similar to the 0.9.1 announcement.)
Line 19: Line 19:




Possibly planned (if someone has the time to actually implement them) are:
New mature features
* Windows support
* Dozens of newly supported mainboards, chipsets and flash chips.
* Various small fixes
* Support for Dr. Kaiser PC-Waechter PCI devices.
* Partial read support
* Support for flashing SPI chips with the Bus Pirate.
* Partial erase support
* Support for the Dediprog SF100 external programmer.
* Partial write support
* Selective blockwise erase for all flash chips.
* Nvidia graphics card (r737, which generations: RIVA, GeForce2/3 and several more; http://www.flashrom.org/trac/flashrom/browser/trunk/gfxnvidia.c#L30) as external flasher
* Automatic chip unlocking.
* Intel E100/E1000 network cards as external parallel/SPI flasher
* Support for each programmer can be selected at compile time.
* libflashrom so we can use the backend in
* Generic detection for unknown flash chips.
** payloads
* Common mainboard features are now detected automatically.
** GUI applications
* Mainboard matching via DMI strings.
* Artec Group LPC Dongle support
* Laptop detection which triggers safety measures.
* Test flags for all part of flashrom operation.
* Windows support for USB-based and serial-based programmers.
* NetBSD support.
* DOS support.
* Slightly changed command line invocation.
 
 
Experimental features
* Support for some NVIDIA graphics cards.
* Chip test pattern generation.
* Support for bit-banging SPI controllers.
* Nvidia MCP6*/MCP7* chipset detection.
* Support for Highpoint ATA/RAID controllers.
 
 
Code quality
* Lots of cleanups.
* Various bugfixes and workarounds for broken third-party software.
* Better error messages.
* Reliability fixes.
* Adjustable severity level for messages.
* Programmer-specific chip size limitation warnings.
* Multiple builtin frontends for flashrom are now possible.
* Increased strictness in board matching.
* Extensive selfchecks on startup to protect against miscompilation.
* Better timing precision for touchy flash chips.
* Do not rely on Linux kernel bugs for mapping memory.
* Improved documentation.
 


If you know of features or pending patches which are not in the list, please mail Carl-Daniel.
If you know of features or pending patches which are not in the list, please mail Carl-Daniel.

Revision as of 00:48, 1 June 2010

Draft

Done are:

  • Dr. Kaiser PC-Wächter flashing support (the FPGA variant)
  • Blockwise erase (infrastructure and a few chips, no user interface yet)
  • split frontend and backend functionality
  • DOS support
  • bitbanging SPI driver infrastructure
  • Bus Pirate support
  • Dediprog SF100 support

Countless new features and bugfixes like:

  • cosmetic and naming/coding style fixes
  • error checking/handling
  • dependency checking/handling
  • Add infrastructure to check and report to the user the maximum supported decode size for chipsets and tested mainboards
  • new message infrastructure
  • Matching board via DMI
  • print runtime and build environment information


New mature features

  • Dozens of newly supported mainboards, chipsets and flash chips.
  • Support for Dr. Kaiser PC-Waechter PCI devices.
  • Support for flashing SPI chips with the Bus Pirate.
  • Support for the Dediprog SF100 external programmer.
  • Selective blockwise erase for all flash chips.
  • Automatic chip unlocking.
  • Support for each programmer can be selected at compile time.
  • Generic detection for unknown flash chips.
  • Common mainboard features are now detected automatically.
  • Mainboard matching via DMI strings.
  • Laptop detection which triggers safety measures.
  • Test flags for all part of flashrom operation.
  • Windows support for USB-based and serial-based programmers.
  • NetBSD support.
  • DOS support.
  • Slightly changed command line invocation.


Experimental features

  • Support for some NVIDIA graphics cards.
  • Chip test pattern generation.
  • Support for bit-banging SPI controllers.
  • Nvidia MCP6*/MCP7* chipset detection.
  • Support for Highpoint ATA/RAID controllers.


Code quality

  • Lots of cleanups.
  • Various bugfixes and workarounds for broken third-party software.
  • Better error messages.
  • Reliability fixes.
  • Adjustable severity level for messages.
  • Programmer-specific chip size limitation warnings.
  • Multiple builtin frontends for flashrom are now possible.
  • Increased strictness in board matching.
  • Extensive selfchecks on startup to protect against miscompilation.
  • Better timing precision for touchy flash chips.
  • Do not rely on Linux kernel bugs for mapping memory.
  • Improved documentation.


If you know of features or pending patches which are not in the list, please mail Carl-Daniel.

Retrieved from "https://wiki.flashrom.org/index.php?title=Flashrom/0.9.2&oldid=1060"