Random notes/MCP SPI support: Difference between revisions

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== Status ==
== Status ==


=== News ===
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Thanks to the efforts of Michael Karcher, we have a clean room reverse engineered doc for the flashing interface, and Carl-Daniel Hailfinger has integrated a [http://patchwork.coreboot.org/patch/1692/ patch] that supports read and write on most boards. There is no further development at the moment, but we are happy about verbose logs of any board that does (not) work and is not already mentioned at [[Supported hardware]].
Thanks to the efforts of Michael Karcher, we have a clean room reverse engineered doc for the flashing interface, and Carl-Daniel Hailfinger has posted a first experimental patch for testing.
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=== Old status ===
=== Old status ===
We can't support SPI flash on Nvidia chipsets (except SPI behind LPC/SPI translation) because we don't have the necessary docs for the SPI interface. There are three ways to solve the problem:
We can't support SPI flash on Nvidia chipsets (except SPI behind LPC/SPI translation) because we don't have the necessary docs for the SPI interface. There are three ways to solve the problem:
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== Want to help? ==
== Want to help? ==


Pick any mainboard with a chipset newer than nForce5 (MCP55). Download latest flashrom and run as root (lspci output as non-root is useless, and flashrom won't work)
Pick any mainboard with a chipset newer than nForce5/MCP55.
  flashrom -V
 
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If you're feeling adventurous and if you can recover from a bricked board (socketed SPI flash chip, and a supported SPI programmer to recover), please apply the following patch against latest flashrom:
http://patchwork.coreboot.org/patch/1580/ , compile it with "make distclean; make" then run as root (lspci output as non-root is useless, and flashrom won't work)
  ./flashrom -V
  lspci -nnvvvxxx
  lspci -nnvvvxxx
  superiotool -deV
  superiotool -deV
and mail the output together with the exact name of the mainboard, a link to a BIOS update file (please don't send the BIOS update file itself) to flashrom@flashrom.org . In case superiotool is not installed, you can skip the superiotool output. Please use a subject which contains "MCP SPI".
and mail the output together with the exact name of the mainboard, a link to a BIOS update file (please don't send the BIOS update file itself) to flashrom@flashrom.org . In case superiotool is not installed, you can skip the superiotool output. Please use a subject which contains "MCP SPI".


If you're feeling adventurous and if you can recover from a bricked board (socketed SPI flash chip, and a supported SPI programmer to recover), please apply the following patches against latest flashrom in this order:
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http://patchwork.coreboot.org/patch/1401/ and http://patchwork.coreboot.org/patch/1402/ , then run the flashrom command mentioned above.


== Notes ==
== Notes ==
=== Tests of the current patch ===
* MCP61, 10de:03e0, LPC OK (valid SPIBAR), ECS Geforce6100SM-M, Andrew Cleveland
* MCP61, 10de:03e0, LPC OK (valid SPIBAR), Biostar NF520-A2 NF61D-A2, Vitaliy Buchynskyy
* MCP65, 10de:0441, SPI OK, MSI MS-7369 K9N Neo-F v2, Kjell Braden
* MCP65, 10de:0441, SPI OK, MSI MS-7369, Wolfgang Schnitker
* MCP65, 10de:0441, SPI OK, MSI MS-7369, Johannes Sjölund
* MCP65, 10de:0441, SPI OK, MSI MS-7369, Melchior Franz
* MCP78S, 10de:075c, SPI OK, Asus M3N78 PRO, Brad Rogers
* MCP78S, 10de:075c, SPI OK, Asus M3N78-VM, Marcel Partap
* MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Kimmo Vuorinen
* MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Vikram Ambrose
* MCP79, 10de:0aad, SPI OK, Acer Aspire R3600, Andrew Morgan
* MCP79, 10de:0aae, LPC ?? (valid SPIBAR), Lenovo Ideapad S12 laptop, Christian Schmitt
* MCP79, 10de:0aae, SPI OK, Apple iMac9,1 Mac-F2218EA9, David "dledson"
=== Mainboard list ===
Boards with SPI flash (confirmed):
* MCP61, Brett Mahar
Boards with SPI flash (unconfirmed, guessed from photo):
Boards with SPI flash (unconfirmed, guessed from photo):
* Acer FMCP7A-ION (in Aspire Revo R3600; GeForce 9400M, MCP7A) [http://www.flickr.com/photos/steve_snaps/3767888634/] [http://www.coreboot.org/pipermail/flashrom/2010-March/002434.html flashrom output]
* Acer FMCP7A-ION (in Aspire Revo R3600; GeForce 9400M, MCP7A) [http://www.flickr.com/photos/steve_snaps/3767888634/] [http://www.coreboot.org/pipermail/flashrom/2010-March/002434.html flashrom output]
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  SPI BAR is at 0x00000000
  SPI BAR is at 0x00000000
Observed on M2N-MX with LPC flash.
Observed on M2N-MX with LPC flash.
--!>

Latest revision as of 13:58, 28 May 2012

Status

Thanks to the efforts of Michael Karcher, we have a clean room reverse engineered doc for the flashing interface, and Carl-Daniel Hailfinger has integrated a patch that supports read and write on most boards. There is no further development at the moment, but we are happy about verbose logs of any board that does (not) work and is not already mentioned at Supported hardware.


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