Random notes/MCP SPI support: Difference between revisions

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(Add P5N78L)
(MCP61 has SPI interface.)
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  ISA/LPC bridge reg 0x00 contents: 0x00, bit 6 is 0, bit 5 is 0
  ISA/LPC bridge reg 0x00 contents: 0x00, bit 6 is 0, bit 5 is 0
  SPI BAR is at 0x00000000
  SPI BAR is at 0x00000000
Observed on M2N-MX with LPC flash - maybe MCP61 has no SPI interface?
Observed on M2N-MX with LPC flash.

Revision as of 12:49, 17 February 2010

Status

We can't support SPI flash on Nvidia chipsets (except SPI behind LPC/SPI translation) because we don't have the necessary docs for the SPI interface. There are three ways to solve the problem:

  • Get docs from Nvidia. We have unofficial word that you either have to buy 100000 chipsets from them or work with a customer of theirs which buys 100000 chipsets to have a reasonable chance of getting programming information. And yes, we tried personal contacts in their software development group.
  • Get Nvidia to contribute code. This might be easier because they don't have to give us docs for the SPI interface if they supply working code. Needs a compelling business reason for them (and AFAICS "it would be cool" or "it would improve Linux support" is not a valid business reason). We can provide skeleton code for them to fill in, reducing the amount of developer time they have to spend to a few (~2-6) hours.
  • Reverse engineer the interface. This is what we're doing right now. Clean room techniques are being followed. If you're willing to test patches on your board, please contact us via IRC or mail. flashrom revision 902 (and later) has some debug code which could help.

Want to help?

Pick any mainboard with a chipset newer than nForce5 (MCP55). Download latest (at least svn revision 902) flashrom and run as root (lspci output as non-root is useless, and flashrom won't work) 

flashrom -V
lspci -nnvvvxxx
superiotool -deV

and mail the output together with the exact name of the mainboard, a link to a BIOS update file (please don't send the BIOS update file itself) to flashrom@flashrom.org . In case superiotool is not installed, you can skip the superiotool output. Please use a subject which contains "MCP SPI".

Notes

Boards with SPI flash (unconfirmed, guessed from photo):

  • Asus M2N-VM HDMI (nForce 630a, MCP67) [1] [2]
  • Asus M2N-VM DVI (nForce 630a, MCP67) [3]
  • Asus M2N-MX SE (nForce 430), probably IT87 translation [4]
  • Asus M2N68-VM (GeForce 7050, MCP67) [5]
  • Asus M2N68-AM SE2 (nForce 630a, MCP61) [6]
  • Asus M2N68-AM Plus (nForce 630a, MCP61 or MCP67) [7]
  • Asus M3N78-EM (GeForce 8200, MCP78S) [8], flashrom output
  • Asus M4N68T-M (nForce 630a) [9]
  • Asus P5N78L (GeForce 9300, MCP79) [10], flashrom output
  • ECS GF8200A (GeForce 8200, MCP78S) [11]
  • Gigabyte GA-M56S-S3 (MCP65) [12]

Boards with LPC flash (unconfirmed, guessed from photo):

  • Asus M2N 1394 (nForce 430) [13]
  • Asus M2N-E (nForce 570 Ultra) [14]
  • Asus M2N-E SLI [15]
  • Asus M2N-DH (nForce 430) [16]
  • Asus M2N-MX (nForce 430/MCP61), (Windbond W39V040C, confirmed) flashrom output
  • Asrock ALiveNF5SLI-1394 (nForce 560 SLI) [17]
  • Asrock ALiveNF5-eSATA2+ (MCP65) [18]
  • Shuttle Barebone SN68PTG5 (MCP67) (PMC Pm49FL004, confirmed)

nForce 630a seems to be exclusively SPI... 

ISA/LPC bridge reg 0x8a contents: 0x.., bit 6 is 1, bit 5 is 0

This seems to be the used flash bus, and the result above points to SPI. 

ISA/LPC bridge reg 0x00 contents: 0x00, bit 6 is 0, bit 5 is 0
SPI BAR is at 0x00000000

Observed on M2N-MX with LPC flash.

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