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| JSPI1 is a 5x2 or 6x2 2.0mm pitch pin header on many MSI motherboards.
| | {{#externalredirect: https://www.flashrom.org/user_docs/msi_jspi1.html }} |
| It is used to recover from bad boot ROM images. Specifically, it appears to be used to connect an alternate ROM with a working image. Pull the #HOLD line low to deselect the onboard SPI ROM, allowing another SPI ROM to take its place on the bus. Pull the #WP line high to disable write-protection. Some boards use 1.8V flash chips, while others use 3.3V flash chips; Check the flash chip datasheet to determine the correct value.
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| | |
| {| class="wikitable" | |
| |+ JSPI1 (5x2)
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| !name!!pin!!pin!!name
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| |-
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| |VCC||1||2||VCC
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| |-
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| |MISO||3||4||MOSI
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| |-
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| |#SS||5||6||SCLK
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| |-
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| |GND||7||8||GND
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| |-
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| |#HOLD||9||''10''||''NC''
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| |}
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| | |
| {| class="wikitable" | |
| |+ JSPI1 (6x2)
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| !name!!pin!!pin!!name
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| |-
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| |VCC||1||2||VCC
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| |-
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| |SO||3||4||SI
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| |-
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| |#SS||5||6||CLK
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| |-
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| |GND||7||8||GND
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| |-
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| |NC||9||10||NC (no pin)
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| |-
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| |#WP||11||12||#HOLD
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| |}
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| | |
| {| class="wikitable"
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| !name!!function
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| |-
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| |VCC||Voltage (See flash chip datasheet)
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| |-
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| |MISO||SPI Master In/Slave Out
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| |-
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| |MOSI||SPI Master Out/Slave In
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| |-
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| |#SS||SPI Slave (Chip) Select (active low)
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| |-
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| |SCLK||SPI Clock
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| |-
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| |GND||ground/common
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| |-
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| |#HOLD||SPI hold (active low)
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| |-
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| |#WP||SPI write-protect (active low)
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| |-
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| |NC||Not Connected (or no pin)
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| |}
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Latest revision as of 13:16, 9 August 2024