MSI JSPI1: Difference between revisions
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JSPI1 is a | JSPI1 is a 5x2 or 6x2 2.0mm pitch pin header on many MSI motherboards. | ||
It is used to recover from bad boot ROM images. Specifically, it appears to be used to connect an alternate ROM with a working image. Pull the #HOLD line low to deselect the onboard SPI ROM, allowing another SPI ROM to take its place on the bus. Pull the #WP line high to disable write-protection. | It is used to recover from bad boot ROM images. Specifically, it appears to be used to connect an alternate ROM with a working image. Pull the #HOLD line low to deselect the onboard SPI ROM, allowing another SPI ROM to take its place on the bus. Pull the #WP line high to disable write-protection. | ||
Revision as of 03:05, 13 October 2020
JSPI1 is a 5x2 or 6x2 2.0mm pitch pin header on many MSI motherboards. It is used to recover from bad boot ROM images. Specifically, it appears to be used to connect an alternate ROM with a working image. Pull the #HOLD line low to deselect the onboard SPI ROM, allowing another SPI ROM to take its place on the bus. Pull the #WP line high to disable write-protection.
| name | pin | pin | name |
|---|---|---|---|
| 3VSB | 1 | 2 | 3VSB |
| MISO | 3 | 4 | MOSI |
| #SS | 5 | 6 | SCLK |
| GND | 7 | 8 | GND |
| #HOLD | 9 | 10 | NC |
| name | pin | pin | name |
|---|---|---|---|
| #HOLD | 1 | 2 | #WP |
| NC | 3 | 4 | NC |
| NC | 5 | 6 | GND |
| CLK | 7 | 8 | #SS |
| SI | 9 | 10 | SO |
| NC | 11 | 12 | 3VSB |
| name | function |
|---|---|
| 3VSB | standby 3.3V |
| MISO | SPI Master In/Slave Out |
| MOSI | SPI Master Out/Slave In |
| #SS | SPI Slave (Chip) Select (active low) |
| SCLK | SPI Clock |
| GND | ground/common |
| #HOLD | SPI hold (active low) |
| #WP | SPI write-protect (active low) |
| NC | Not Connected (or no pin) |