Revision as of 10:41, 1 June 2014

IMPORTANT: This is work in progress. Its purpose is to organize code review and track improvements as they are pushed to our repository. Some of the stuff mentioned below may not get included or even be removed later again.

TODO list for this release

programmers
- nicintel_eeprom
chips
- MX25U12835F
chipsets
Baytrail & Rangeley/Avoton support?
unknown AMD chipset warning (exclude Bolton)
boards
platform/arch/os
ui
- enum test_state + wiki changes
infrastructure
- fix mapping (of large chips)
misc
- tested stuff

New major user-visible features

Better support for AMD chipsets in general (speed selection, more conservative defaults etc.).
Support for AMD Yangtze's SPI controller (found in Kabini and Tamesh). Bolton FCHs (A78, A88X, A77E) are not supported yet.
Support for VIA VT6421A LPC programmer as atavia (found on PCI SATA controllers).
Support for switching betweens chips on boards with GIGABYTE's DualBIOS (using the dualbiosindex programmer parameter).
Enable fwh_idsel parameter for C-ICH and ICH2/3/4/5 chipsets.
Extension of the rayer_spi module to supported various similar devices (Altera ByteBlasterMV, Atmel STK200/300, Wiggler LPT).
Finer-grained display of support status (new states: configuration-dependent, not applicable).

New chips

Atmel AT45DB family + AT45CS1282
ESMT F25L32PA
Fujitsu MBM29LV160BE/TE
Macronix MX23L3254 (the first supported mask ROM)
Sanyo LE25FW406A and LE25FU406B
Spansion S25FL132K and S25FL164K
SST25LF020A, SST25WF080, SST25VF512A, SST25VF020 and SST25VF020B
ST M50LPW080

Infrastructural improvements and fixes

Automatic unmapping and rounding of memory maps.
Using an internal DMI decoder instead of relying on dmidecode.
Addition of getrevision.sh to retrieve various data from SCM systems.
Removal of yet another bunch of exit() calls and other code interfering with the creation of libflashrom.
First huge step to refactor Intel Chipset Enables.

Download

flashrom 0.9.8 can be downloaded in various ways:

Anonymous checkout from the subversion repository at svn://flashrom.org/flashrom/tags/flashrom-0.9.8

A tarball is available for download at

http://download.flashrom.org/releases/flashrom-0.9.8.tar.bz2 (GPG signature).

Supported hardware

Please see the archived status page for the hardware supported by this release.

@@ Line 8: / Line 8: @@
 =TODO list for this release=
 * programmers
-** VIA VT6421A
+** <tt>nicintel_eeprom</tt>
-** nicintel_eeprom
 * chips
 ** MX25U12835F
@@ Line 28: / Line 27: @@
 * Better support for AMD chipsets in general (speed selection, more conservative defaults etc.).
 * Support for AMD Yangtze's SPI controller (found in Kabini and Tamesh). Bolton FCHs (A78, A88X, A77E) are not supported yet.
-* Support for switching betweens chips on boards with GIGABYTE's DualBIOS.
+* Support for VIA VT6421A LPC programmer as <tt>atavia</tt> (found on PCI SATA controllers).
+* Support for switching betweens chips on boards with GIGABYTE's DualBIOS (using the <tt>dualbiosindex</tt> programmer parameter).
 * Enable fwh_idsel parameter for C-ICH and ICH2/3/4/5 chipsets.
-* Extension of the rayer_spi module to supported various similar devices (Altera ByteBlasterMV, Atmel STK200/300, Wiggler LPT).
+* Extension of the <tt>rayer_spi</tt> module to supported various similar devices (Altera ByteBlasterMV, Atmel STK200/300, Wiggler LPT).
 * Finer-grained display of support status (new states: configuration-dependent, not applicable).
@@ Line 48: / Line 48: @@
 * Using an internal DMI decoder instead of relying on dmidecode.
 * Addition of getrevision.sh to retrieve various data from SCM systems.
-* Removal of yet another bunch of exit() calls and other code interfering with the creation of libflashrom.
+* Removal of yet another bunch of <tt>exit()</tt> calls and other code interfering with the creation of libflashrom.
 * First huge step to refactor Intel Chipset Enables.

Flashrom/0.9.8: Difference between revisions